Light on the Chip: From IBM Labs to Nvidia's AI Factories

Over the last two years, co-packaged optics has ceased to be purely a research topic. Broadcom has been steadily advancing the Tomahawk CPO platform across several generations, while Nvidia has brought Spectrum-X Photonics and Quantum-X Photonics into a public product framework as part of its AI factory strategy. That means moving optics closer to the ASIC should now be viewed not as a laboratory experiment, but as a real architectural option for high-density AI fabric networks.

For the market, this is an important shift. For decades, the pluggable optics ecosystem — from SFP to QSFP-DD and OSFP — has remained the optimal model for most networking scenarios because of its flexibility, serviceability, and the ability to scale different types of links within a single infrastructure. But as speeds, port density, and power consumption continue to rise in AI clusters, the limits of the electrical path between the ASIC and the front-panel module cage are becoming increasingly visible. It is precisely at this point that CPO begins to look less like a future alternative and more like an engineering response to constraints that already exist today.

At IPTP Networks, we look at this evolution without technological romanticism: not as a replacement for the entire existing optical ecosystem, but as the arrival of a new class of solutions for very specific tasks. To understand where co-packaged optics truly changes the economics and design of the data center, it is important to trace the full path of the technology — from early silicon photonics research and the first large-scale pluggable deployments to production-grade CPO systems that are now beginning to find their place in AI infrastructure.

This is one of those moments when a technology that has been maturing in research labs for decades crosses a threshold and begins to change not presentation slides, but what actually goes into racks. So it is worth looking at the full picture: where this started, why pluggable optics became the backbone of network infrastructure, and what is genuinely changing now.

Where It All Started: Silicon and Light

The idea of using silicon — the same material that underpins modern microelectronics — to guide and manipulate light dates back to the mid-1980s. Early work by Richard Soref, together with the subsequent development of silicon-on-insulator platforms, laid the foundation for silicon photonics in its modern form: optical waveguides compatible with CMOS manufacturing and potentially coexisting with electronics on the same technological base.

DARPA recognized quite early that this was not academic curiosity but a potentially practical platform. Through its EPIC program, the agency funded work at the Massachusetts Institute of Technology, the University of California, Santa Barbara, and other research groups, which produced several critical building blocks: a germanium photodetector on silicon and a hybrid silicon laser. The laser was especially important, because silicon itself cannot generate light, and integrating a laser remained one of the central engineering challenges for the industry for years.

One of the first visible commercial breakthroughs came from Luxtera. Founded in 2001 out of the California Institute of Technology ecosystem, the company bet on photonic integrated circuits manufactured in standard CMOS processes. By 2012, Luxtera had reported shipment of its millionth 10-gigabit silicon photonics channel, and later became part of Cisco, which completed the acquisition in 2019 to expand its optical capabilities across the webscale, enterprise, and service provider markets.
IBM followed a parallel path. After more than a decade of research, the company announced in 2012 that it had transferred silicon nanophotonics into a commercial 90-nanometer silicon-on-insulator CMOS foundry process.

The core significance of that breakthrough was that wavelength-division multiplexing components, modulators, detectors, and electronic transistors could all be manufactured side by side within the same production line. For the industry, this was the moment when silicon photonics began to look less like an elegant scientific demonstration and more like a technology with real manufacturing economics behind it.

Intel reached the commercial stage after many years of internal development and brought silicon photonics pluggables into mass deployment beginning in 2016. Today, the company itself speaks of more than 8 million photonic integrated circuits shipped and more than 32 million integrated on-chip lasers embedded in pluggable optical transceivers for data centers. That is a strong indication that silicon photonics has long since moved beyond the niche stage and become part of the industrial networking baseline.

The Pluggable Era: Flexibility as the Killer Feature

If you look at the early history of silicon photonics without romanticizing it, the winner was not the abstract idea of a “photonic chip,” but a very specific product format: the pluggable transceiver. SFP, SFP+, QSFP28, QSFP-DD, OSFP — the hot-swappable module that slides into a cage on the front panel of a switch or router, building on a much longer lineage of legacy optical transmission standards and transceiver formats. That format turned out to be maximally compatible with the realities of network operations.

From the perspective of an operator, a cloud provider, or the owner of a distributed information technology infrastructure, the logic behind that dominance is obvious. A pluggable module lets you change reach, interface type, and optical class without replacing the chassis; stock different modules for different scenarios; and replace a failed unit quickly and locally, without disturbing the platform as a whole. That is exactly why pluggable optics remained the foundational form factor for both data centers and transport and enterprise networks for decades.

Silicon photonics, for its part, did not disrupt this world so much as enter into it. Intel sold silicon photonics in pluggable form by the millions; other vendors built entire product lines of QSFP and OSFP transceivers around silicon photonics. The technology increased integration, improved manufacturing characteristics and reliability, but the form factor itself remained familiar and operationally convenient.

The Limits of the Cage

So why is anything changing at all? If pluggable silicon photonics modules are mature, widely deployed, and still valuable, why does the market need co-packaged optics?

The answer is physics — more specifically, what happens between the switch ASIC and the front-panel cage. In the classic pluggable architecture, a high-speed electrical signal has to travel from the chip over a printed circuit board trace to the module on the faceplate, and only there is it converted into light. At 100 gigabits per second, and even in part of the 400-gigabit era, that path remains manageable. But as the industry moves toward 1.6 terabits per second and higher densities, every additional unit of electrical distance becomes increasingly expensive in signal integrity and power budget.

That is precisely what co-packaged optics addresses: the optical engine is moved as close as possible to the switch silicon, the electrical path is reduced to millimeters, a significant share of the losses disappears, and with them a significant share of the energy cost of moving each bit. In practical terms, that means lower power consumption, higher density, and more stable operation at speeds where the front-panel electrical path becomes a system-level limitation.

Broadcom: The CPO Pioneer

Before Nvidia turned co-packaged optics into one of the central narratives in AI infrastructure, Broadcom had already spent several years building the technology quietly and methodically. As early as 2021, the company publicly showed Humboldt — a 25.6-terabits-per-second co-packaged optics switch based on Tomahawk 4 — and then developed that line into Bailly, the first 51.2-terabits-per-second co-packaged optics Ethernet switch shipped to customers.

In the second generation, the design became especially instructive: Bailly integrated eight silicon photonics optical engines of 6.4 terabits per second each directly into the switch package. Broadcom and its partners were simultaneously refining not just the silicon itself, but all the surrounding elements that make the platform viable outside a laboratory: thermal design, outsourced semiconductor assembly and test processes, handling procedures, fiber routing, sockets, cages, connectors, and complete switch systems. This was not a flashy one-off announcement, but a rare example of methodical engineering evolution across multiple product generations.

That is why the most important signals from Broadcom are not promises but production indicators. The company publicly reported one million cumulative 400-gigabit-equivalent port device hours of flap-free co-packaged optics operation at Meta, and its partners have already brought production-ready systems to market. Delta, for example, has shown a three-rack-unit system based on Tomahawk 5 Bailly with support for both air and liquid cooling and with more than 30 percent claimed power savings compared to traditional pluggable switches.

In 2025, Broadcom also announced its third generation of co-packaged optics with 200 gigabits per second per lane and confirmed fourth-generation development at 400 gigabits per second per lane. That is an important signal: the company is not building a single showcase, but a roadmap specifically designed for the era of AI scale-up and scale-out fabrics.

Nvidia Enters: The AI Factory Catalyst

Now we come to what truly made the topic visible to the broader market. Nvidia announced Spectrum-X Photonics and Quantum-X Photonics in March 2025, and throughout 2025 and 2026 turned silicon photonics into part of its broader architectural story around AI factories. At the same time, based on Nvidia’s open materials and partner announcements, it is more accurate at this stage to speak not of “massive production deployments everywhere,” but of a platform that has entered the product line, while major customers have publicly stated plans to integrate it into next-generation systems.

Technically, Nvidia’s approach differs from Broadcom’s. Instead of fully embedded optics in a single monolithic package, the company uses detachable optical sub-assemblies: removable optical units arranged around each switch ASIC. That makes the service model more practical: a failed optical module can be replaced without replacing the ASIC itself. For the industry, this is an important engineering fork, because one of the main long-standing questions around co-packaged optics has always been serviceability.

At the technological foundation of this scheme is TSMC’s COUPE platform with SoIC-X stacking: a photonic integrated circuit and an electronic integrated circuit are joined through an ultra-short interface. Nvidia describes the use of micro-ring modulators and 1.6-terabits-per-second optical engines as part of a system intended to reduce power consumption and increase network resiliency in AI fabrics. In other words, the optics here is not a standalone product, but an element of a broader stack design.

The Design Philosophy Difference

In this story, Broadcom and Nvidia represent two different philosophies. Broadcom is building a horizontal, ecosystem-friendly model: Ethernet-native co-packaged optics available through original equipment manufacturer partners and integrated into a more open market of switch systems. That approach matters particularly for operators living in a world of multilayer integration, existing architectures, and gradual adoption of new technology.

Nvidia, by contrast, is building a vertical stack. Quantum-X Photonics and Spectrum-X Photonics do not exist on their own, but as parts of a platform tied to graphics processing unit nodes, NVLink, NCCL, InfiniBand and Ethernet fabrics, and the larger logic of the AI factory. When Nvidia shows photonics switches alongside Rubin-based and Blackwell-based systems, it is not presenting a standalone networking product, but a jointly designed compute-and-network architecture.

What Does Not Change: The Operator Perspective

For all the significance of co-packaged optics, it is important not to overstate the conclusion. Everything described above applies first and foremost to fixed, pre-designed topologies in large AI data centers and hyperscale clusters. In environments where the fabric is built around a known architecture, and where power efficiency, density, and predictable scale-out matter most, co-packaged optics begins to look like a natural next step.

But for carrier, transport, metro, and enterprise aggregation scenarios, pluggable optics is not going anywhere. Its value still rests on the same foundations:

• the ability to change reach and optical type without replacing the platform;
• the ability to replace a failed module quickly in the field;
• the ability to support different distances and different operational profiles within the same product family.

That is why QSFP-DD, OSFP, and coherent pluggables will remain the workhorses of real infrastructure for a long time wherever operational flexibility matters more than extreme optical integration density.

For customers, this means that the choice between pluggable optics and co-packaged optics in the coming years will not be a question of technological fashion, but of architectural fit. In some scenarios — above all, dense AI fabric networks with a predefined topology — co-packaged optics can deliver clear gains in power, density, and reliability. In others — especially where flexibility, field replacement, and mixed optical profiles matter — pluggable optics will remain the more rational choice for a long time. It is at this boundary that the key engineering decision point for new data centers and AI clusters now sits.

Looking Forward

What Nvidia highlighted at GTC 2025 and continued to emphasize at GTC 2026, and what Broadcom has reinforced through its co-packaged optics roadmap and Meta results, comes down to one conclusion: co-packaged silicon photonics has crossed the threshold beyond which it can no longer be treated as a purely research topic. The platforms, the supply chain, and the ecosystem pieces are already in place: foundry capacity on the TSMC side, optical component suppliers, packaging partners, system integrators, and ready reference designs.

If you look at this trajectory on a historical scale, the path from early silicon waveguide concepts to switches in which optics comes right up against the switch silicon truly does look like a major technology cycle finally reaching manufacturing maturity. But something else matters just as much: this cycle does not eliminate the world of pluggables. It simply adds a new class of architectural solutions alongside it.

For companies like IPTP Networks, operating a global network and data center footprint, the practical meaning of this evolution is not to declare “the end of the pluggable optics era,” but to understand more precisely where the new model genuinely creates an advantage. If a team today is designing an AI cluster, upgrading a data center fabric, or evaluating the move to 800 gigabits per second or 1.6 terabits per second, the right place to begin is not with vendor selection, but with an architectural assessment: where co-packaged optics truly improves economics and operations, and where pluggable optics remains the optimal model.

The next chapter here will not be about hype, but about routine engineering work, including global deployment logistics, maintenance, and operational adaptation. In that sense, the equipment changes, but the engineering discipline does not.

Sources

1. NVIDIA Announces Spectrum-X Photonics, Co-Packaged Optics Networking Switches to Scale AI Factories to Millions of GPUs.
2. GTC 2026 keynote and event materials.
3. NVIDIA Technical Blog: A New Era in Data Center Networking with NVIDIA Silicon Photonics-Based Network Switching.
4. NVIDIA Technical Blog: Scaling AI Factories with Co-Packaged Optics for Better Power Efficiency.
5. NVIDIA blog on SC25 and announced integrations by TACC, Lambda, and CoreWeave.
6. TSMC COUPE and SoIC-X announcement.
7. Broadcom: Announces Third-Generation Co-Packaged Optics Technology with 200 Gigabits per Second per Lane Capability.
8. Broadcom: Showcases Industry-Leading Quality and Reliability of Co-Packaged Optics.
9. Broadcom: Delivers Industry’s First 51.2-Terabits-Per-Second Co-Packaged Optics Ethernet Switch.
10. Delta Electronics / COMPUTEX 2025 co-packaged optics switch announcement.
11. APNIC Blog: Co-Packaged Optics: A Deep Dive.
12. DARPA EPIC program overview.
13. IBM Research: Photonic Devices and IBM’s 90-nanometer CMOS integrated nanophotonics publication.
14. IBM press material on silicon nanophotonics and manufacturing transition.
15. Cisco acquisition materials related to Luxtera.
16. Luxtera milestone: one millionth silicon CMOS photonics-enabled 10-gigabit channel.
17. Intel Silicon Photonics official page.
18. Intel optical input/output announcement with cumulative shipment context.
19. Meta Engineering: Designing 100G Optical Connections.
20. Richard Soref and historical silicon photonics context.
21. Optical transceiver market context.